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| TS616 Dual wide band operational amplifier with high output current Features Low noise: 2.5 nV/Hz High output current: 420 mA Very low harmonic and intermodulation distortion High slew rate: 420 V/s -3dB bandwidth: 40 MHz @ gain = 12 dB on 25 single-ended load 20.7 Vp-p differential output swing on 50 load, 12 V power supply Current feedback structure 5 V to 12 V power supply Specified for 20 and 50 differential load Output1 1 Inverting Input1 2 Non Inverting Input1 3 8 VCC + DW SO-8 Exposed-pad (Plastic micropackage) Pin connections (top view) + 7 Output2 + 6 Inverting Input2 5 Non Inverting Input2 dice Applications VCC - 4 Line driver for xDSL Multiple video line driver Pad Cross Section View Showing Exposed-Pad. This pad must be connected to a (-Vcc) copper area on the PCB Description The TS616 is a dual operational amplifier featuring a high output current of 410 mA. This driver can be configured differentially for driving signals in telecommunication systems using multiple carriers. The TS616 is ideally suited for xDSL (high speed asymmetrical digital subscriber line) applications. This circuit is capable of driving a 10 or 25 load on a range of power supplies: 2.5 V, 5 V, 6 V or +12 V. The TS616 is capable of reaching a -3 dB bandwidth of 40 MHz on 25 load with a 12 dB gain. This device is designed for high slew rates and demonstrates low harmonic distortion and intermodulation. September 2008 Rev 5 1/37 www.st.com 37 Contents TS616 Contents 1 2 3 4 5 6 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Safe operating area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Intermodulation distortion product . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Printed circuit board layout considerations . . . . . . . . . . . . . . . . . . . . . 20 6.1 Thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 Noise measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.1 7.2 7.3 Measurement of eN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Measurement of iNn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Measurement of iNp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 8 Power supply bypassing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8.1 8.2 Single power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Channel separation and crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9 Choosing the feedback circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9.1 9.2 The bias of an inverting amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Active filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 10 11 12 13 Increasing the line level using active impedance matching . . . . . . . . 31 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2/37 TS616 Typical application 1 Typical application Figure 1 shows a schematic of a typical xDSL application using the TS616. Figure 1. Differential line driver for xDSL applications 3 2 8 + _ +Vcc 1 12.5 1/2TS616 1/2TS615 Vi R2 R1 GND R4 Vo 25 Vo 12.5 1:2 100 Vi 4 5 _ R3 1/2TS616 1/2TS615 + 4 -Vcc 3/37 Absolute maximum ratings and operating conditions TS616 2 Absolute maximum ratings and operating conditions Table 1. Symbol VCC Vid Vin Toper Tstd Tj Rthjc Rthja Pmax ESD only pins 1, 4, 7, 8 ESD only pins 2, 3, 5, 6 Supply voltage (1) Differential input voltage Input voltage range (3) (2) Absolute maximum ratings Parameter Value 7 2 6 -40 to + 85 -65 to +150 150 16 60 2 1.5 2 200 1.5 2 100 (7) Unit V V V C C C C/W C/W W kV kV V kV kV V Operating free air temperature range Storage temperature Maximum junction temperature Thermal resistance junction to case Thermal resistance junction to ambient area Maximum power dissipation (at Tamb = 25 C) for Tj = 150 C HBM: human body model(4) MM: machine model(5) CDM: charged device model(6) HBM: human body model(4) MM: machine model(5) CDM: charged device model(6) Output short circuit 1. All voltage values, except differential voltage are with respect to network terminal. 2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of input and output voltage must never exceed VCC +0.3 V. 4. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 5. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 6. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. 7. An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating. Destructive dissipation can result from short-circuits on amplifiers. Table 2. Symbol VCC Vicm Operating conditions Parameter Power supply voltage Common mode input voltage Value 2.5 to 6 -VCC+1.5 V to +VCC-1.5 V Unit V V 4/37 TS616 Electrical characteristics 3 Table 3. Symbol Electrical characteristics VCC = 6 V, Rfb= 910 Tamb = 25 C (unless otherwise specified) , Parameter Test conditions Min. Typ. Max. Unit DC performance Vio Vio Iib+ Input offset voltage Differential input offset voltage Positive input bias current Tamb Tmin < Tamb < Tmax Tamb = 25C Tamb Tmin < Tamb < Tmax Negative input bias current Input(+) impedance Input(-) impedance Input(+) capacitance Common mode rejection ratio 20 log (Vic/Vio) Supply voltage rejection ratio 20 log (VCC/Vio) Total supply current per operator Vic = 4.5V Tmin < Tamb < Tmax VCC = 2.5V to 6V Tmin < Tamb < Tmax No load 72 58 Tamb Tmin < Tamb < Tmax 5 7.2 3 3.1 82 54 1 64 dB 62 81 dB 80 13.5 17 mA k pF 15 A 1 1.6 2.5 30 A mV 3.5 mV IibZIN+ ZINCIN+ CMR SVR ICC Dynamic performance and output characteristics ROL Open loop transimpedance Vout = 7Vp-p, RL = 25 Tmin < Tamb < Tmax -3dB bandwidth BW Full power bandwidth Gain flatness @ 0.1dB Tr Tf Ts SR VOH VOL Rise time Fall time Settling time Slew rate High level output voltage Low level output voltage Small signal Vout < 20mVp AV = 12dB, RL = 25 Large signal Vout = 3Vp AV = 12dB, RL = 25 Small signal Tamb<20mVp AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL = 25 Vout = 6Vp-p, AV= 12dB, RL = 25 Vout = 6Vp-p, AV = 12dB, RL = 25 RL = 25 connected to GND RL = 25 Connected to GND 330 4.8 25 5 13.5 M 5.7 40 MHz 26 7 10.6 12.2 50 420 5.05 -5.3 -5.1 MHz ns ns ns V/s V V 5/37 Electrical characteristics Table 3. Symbol TS616 VCC = 6 V, Rfb= 910 Tamb = 25 C (unless otherwise specified) (continued) , Parameter Output sink current Test conditions Vout = -4Vp Tmin < Tamb < Tmax Output source current Vout = +4Vp Tmin < Tamb < Tmax 330 Min. -320 Typ. -490 -395 mA 420 370 Max. Unit Iout Noise and distortion eN iNp iNn HD2 HD3 Equivalent input noise voltage Equivalent input noise current (+) Equivalent input noise current (-) 2nd harmonic distortion (differential configuration) 3rd harmonic distortion (differential configuration) F = 100kHz F = 100kHz F = 100kHz Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. Vout = 14Vp-p, AV = 12dB F= 110kHz, RL = 50 diff. F1= 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1= 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1 = 100kHz, F2 = 110kHz Vout = 16Vp-p, AV = 12dB RL = 50 diff. F1 = 370kHz, F2 = 400kHz Vout = 16Vp-p, AV = 12 B RL = 50 diff. 2.5 15 21 -87 -83 nV/Hz pA/Hz pA/Hz dBc dBc -76 dBc -75 IM2 2nd order intermodulation product (differential configuration) -88 dBc -87 IM3 3rd order intermodulation product (differential configuration) 6/37 TS616 Table 4. Symbol DC performance Vio Vio Iib+ Input offset voltage Differential input offset voltage Positive input bias current Tamb Tmin < Tamb < Tmax Tamb = 25C Tamb Tmin < Tamb < Tmax Negative input bias current Input(+) impedance Input(-) impedance Input(+) capacitance Common mode rejection ratio 20 log (Vic/Vio) Supply voltage rejection ratio 20 log (Vcc/Vio) Total supply current per operator Vic = 1V Tmin < Tamb < Tmax VCC= 2V to 2.5V Tmin < Tamb < Tmax No load 63 55 Tamb Tmin < Tamb < Tmax Electrical characteristics VCC = 2.5 V, Rfb= 910 Tamb = 25 C (unless otherwise specified) , Parameter Test conditions Min. Typ. Max. Unit 0.2 1 2.5 mV 2.5 mV A 4 7 1.1 1.2 71 62 1.5 61 30 11 A k pF dB IibZIN+ ZINCIN+ CMR 60 79 dB 78 11.5 15 mA SVR ICC Dynamic performance and output characteristics ROL Open loop transimpedance Vout = 2Vp-p, RL = 10 Tmin < Tamb < Tmax -3dB bandwidth BW Full power bandwidth Gain flatness @ 0.1dB Tr Tf Ts SR VOH VOL Rise time Fall time Settling time Slew rate High level output voltage Low level output voltage Output sink current Iout Output source current Small signal Vout < 20mVp AV = 12dB, RL = 10 Large signal Vout = 1.4Vp AV= 12dB, RL = 10 Small signal Vout< 20mVp AV = 12dB, RL = 10 Vout = 2.8Vp-p, AV = 12dB RL= 10 Vout = 2.8Vp-p, AV = 12dB RL= 10 Vout = 2.2Vp-p, AV = 12dB RL= 10 Vout = 2.2Vp-p, AV = 12dB RL =10 RL=10 connected to GND RL=10 connected to GND Vout = -1.25Vp Tmin < Tamb < Tmax Vout = +1.25Vp Tmin < Tamb < Tmax 200 -300 100 1.5 20 2 4.2 M 1.5 28 MHz 20 5.7 11 11.5 39 130 1.7 -1.9 -400 -360 mA 270 240 -1.7 MHz ns ns ns V/s V V 7/37 Electrical characteristics Table 4. Symbol TS616 VCC = 2.5 V, Rfb= 910 Tamb = 25 C (unless otherwise specified) (continued) , Parameter Test conditions Min. Typ. Max. Unit Noise and distorsion eN iNp iNn HD2 HD3 Equivalent input noise voltage Equivalent input noise current (+) Equivalent input noise current (-) 2nd harmonic distortion (differential configuration) 3rd harmonic distortion (differential configuration) F = 100kHz F = 100kHz F = 100kHz Vout = 6Vp-p, AV = 12 dB F= 110kHz, RL = 20 diff. Vout = 6Vp-p, AV = 12dB F= 110 kHz, RL = 20 diff. F1= 100 kHz, F2 = 110 kHz Vout = 6 Vp-p, AV = 12dB RL = 20 diff. F1= 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1 = 100kHz, F2 = 110kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. F1 = 370kHz, F2 = 400kHz Vout = 6Vp-p, AV = 12dB RL = 20 diff. 2.5 15 21 -97 -98 nV/Hz pA/Hz pA/Hz dBc dBc -86 dBc -88 IM2 2nd order intermodulation product (differential configuration) -90 dBc -85 IM3 3rd order intermodulation product (differential configuration) 8/37 TS616 Electrical characteristics Figure 2. RL= 25 VCC= 6 V Load configuration Figure 3. RL= 25 VCC= .5V Load configuration + _ +6V 50 cable 49.9 + 50 +2.5V 50 cable TS616 -6V 25 33 1W TS616 10 49.9 _ -2.5V 11 0.5W 50 Figure 4. Closed loop gain vs. frequency VCC=6V, Rfb=750, RL= 25 gain (Vcc=6V) (Vcc=2.5V) Figure 5. Closed loop gain vs. frequency AV=+1, VCC=2.5V, Rfb=1.1k, RL= 10 2 0 -2 -4 40 20 AV=-1, VCC= 2.5V, Rfb=1k, Rin=1k, RL= 10 VCC=6V, Rfb=680, Rin=680, RL= 25 2 0 (Vcc=2.5V) -140 -160 gain phase 0 -2 -4 phase (Vcc=6V) -180 -200 -220 (gain (dB) Phase () -6 -8 -10 -12 -14 -16 (Vcc=2.5V) -6 -8 -10 -12 -14 -16 (Vcc=2.5V) (Vcc=6V) -40 (Vcc=6V) -60 -80 -100 -120 100 1k 10k 100k 1M 10M 100M -240 -260 -280 -300 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) Figure 6. Closed loop gain vs. frequency Figure 7. Closed loop gain vs. frequency AV=+2, VCC=2.5V, Rfb=1k, RL= 10 VCC=6V, Rfb=680, RL= 25 8 6 4 2 40 20 AV=-2, VCC=2.5V, Rfb=1k, Rin=510, RL=10 VCC=6V, Rfb=680, Rin=750/620, RL= 25 8 6 4 -140 -160 gain phase (Vcc=6V) gain phase (Vcc=2.5V) (Vcc=6V) (Vcc=2.5V) 0 2 -180 -200 -220 (gain (dB)) Phase () 0 -2 -4 -6 -8 -10 (Vcc=2.5V) (Vcc=6V) 0 -2 -4 -6 -8 -10 (Vcc=2.5V) (Vcc=6V) -40 -60 -80 -100 -120 100 1k 10k 100k 1M 10M 100M -240 -260 -280 -300 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) 9/37 Phase () -20 (gain (dB)) Phase () -20 (gain (dB)) Electrical characteristics TS616 Figure 8. Closed loop gain vs. frequency Figure 9. Closed loop gain vs. frequency AV=+4, VCC=2.5V, Rfb=910, Rg=300, RL=10 VCC=6V, Rfb=620, Rg=560/330, RL= 25 40 14 gain 12 (Vcc=2.5V) AV=-4, VCC=2.5V, Rfb=1k Rin=320/360 RL=10 14 12 (Vcc=2.5V) VCC=6V, Rfb=620, Rin=360/270, RL= 25 gain -140 -160 20 10 8 phase (Vcc=6V) 10 0 8 -20 -40 phase (Vcc=6V) -180 -200 -220 (gain (dB)) (gain (dB)) Phase () 6 4 2 0 -2 -4 (Vcc=2.5V) (Vcc=6V) 6 4 2 0 -2 -4 (Vcc=2.5V) (Vcc=6V) -60 -80 -100 -120 100 1k 10k 100k 1M 10M 100M -240 -260 -280 -300 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) Figure 10. Closed loop gain vs. frequency AV=+8, VCC=2.5V, Rfb=680 Rg=240/160 RL=10 , , VCC=6V, Rfb=510, Rg=270/100, RL= 25 20 18 (Vcc=2.5V) Figure 11. Closed loop gain vs. frequency AV=-8, VCC=2.5V, Rfb=680 Rin=160/180 RL=10 20 18 (Vcc=2.5V) 40 20 VCC=6V, Rfb=510, Rin=150/110, RL= 25 gain -140 -160 gain 16 14 phase (Vcc=6V) 0 -20 -40 16 14 phase (Vcc=6V) -180 -200 -220 (gain (dB)) (gain (dB)) Phase () 12 10 8 6 4 2 (Vcc=2.5V) (Vcc=6V) 12 10 8 6 4 2 (Vcc=2.5V) (Vcc=6V) -60 -80 -100 -120 100 1k 10k 100k 1M 10M 100M -240 -260 -280 -300 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Frequency (Hz) Figure 12. Positive slew rate AV = +4, Rfb = 910 VCC = 6 , RL= 25 , 4 Figure 13. Positive slew rate AV = +4, Rfb = 910 VCC = 2.5V, RL= 10 , 2 2 1 VOUT (V) 0 VOUT (V) 0 -2 -1 -4 0.0 10.0n 20.0n 30.0n 40.0n 50.0n -2 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Time (s) Time (s) 10/37 Phase () Phase () TS616 Electrical characteristics Figure 14. Positive slew rate AV = -4, Rfb = 620 VCC = 6 V, RL= 25 , 4 Figure 15. Positive slew rate AV = -4, Rfb = 910 VCC = 2.5 V, RL= 10 , 2 2 1 0 VOUT (V) 10.0n 20.0n 30.0n 40.0n 50.0n VOUT (V) 0 -2 -1 -4 0.0 -2 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Time (s) Time (s) Figure 16. Negative slew rate AV = +4, Rfb = 620 VCC = 6 V, RL= 25 , 4 Figure 17. Negative slew rate AV = +4, Rfb = 910 VCC = 2.5 V, RL= 10 , 2 2 1 VOUT (V) 0 VOUT (V) 10.0n 20.0n 30.0n 40.0n 50.0n 0 -2 -1 -4 0.0 -2 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Time (s) Time (s) Figure 18. Negative slew rate AV = +4, Rfb = 620 VCC = 6 V, RL= 25 , 4 Figure 19. Negative slew rate AV = +4, Rfb = 910 VCC = 2.5 V, RL= 10 , 2 2 VOUT (V) 0 VOUT (V) 10.0n 20.0n 30.0n 40.0n 50.0n 0 -2 -4 0.0 -2 0.0 10.0n 20.0n 30.0n 40.0n 50.0n Time (s) Time (s) 11/37 Electrical characteristics TS616 Figure 20. Input voltage noise level AV = +92, Rfb = 910 Input+ connected to GND via 25 5.0 Figure 21. ICC vs. power supply Open loop, no load 30 + Input Voltage Noise (nV/Hz) 4.5 + 6V - 6V 910 910 Output 20 Icc(+) _ 10 4.0 10 ICC (mA) 3.5 0 3.0 -10 2.5 -20 Icc(-) 2.0 100 -30 1k 10k 100k 1M 0 1 2 3 4 5 6 7 8 9 10 11 12 (Frequency (Hz) VCC (V) Figure 22. Iib vs. power supply Open loop, no load 7 Figure 23. VOH & VOL vs. power supply Open loop, RL = 25 6 5 VOH 6 Iib+ IB+ 4 3 VOH & VOL (V) 5 2 1 0 -1 -2 -3 -4 VOL Iib (A) IB 4 3 2 Iib- IB- 1 -5 0 5 6 7 8 9 10 11 12 -6 5 6 7 8 9 10 11 12 Vcc (V) Vcc (V) Figure 24. Isource vs. output amplitude VCC = 6 V, open loop, no load 700 Figure 25. Isource vs. output amplitude VCC = 2.5 V, open loop, no load 700 600 600 Isource (mA) 400 Isource (mA) 0 1 2 3 4 5 6 500 500 400 300 300 200 200 100 100 0 0 0.0 0.5 1.0 1.5 2.0 2.5 Vout (V) Vout (V) 12/37 TS616 Electrical characteristics Figure 26. Isink vs. output amplitude VCC = 6 V, open loop, no load 0 Figure 27. Isink vs. output amplitude VCC = 2.5 V, open loop, no load 0 -100 -100 -200 -200 Isink (mA) -300 Isink (mA) -6 -5 -4 -3 -2 -1 0 -300 -400 -400 -500 -500 -600 -600 -700 -700 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 Vout (V) Vout (V) Figure 28. Maximum output amplitude vs. load Figure 29. Bandwidth vs. temperature AV = +4, Rfb = 620 VCC = 6 V , 12 Vcc=6V AV = +4, Rfb = 910 50 Vcc=6V Load=25 45 10 VOUT-MAX (VP-P) 8 40 6 Bw (MHz) Vcc=2.5V 35 4 30 Vcc=2.5V Load=10 2 25 0 0 50 100 150 200 20 -40 -20 0 20 40 60 80 RLOAD () Temperature (C) Figure 30. Transimpedance vs. temperature Open loop 30 Figure 31. ICC vs. temperature Open loop, no load 14 12 10 25 Vcc=6V 20 Icc(+) for Vcc=2.5V Icc(+) for Vcc=6V 8 6 4 ROL (M) ICC (mA) 2 0 -2 -4 15 10 Vcc=2.5V 5 -6 -8 -10 -12 Icc(-) for Vcc=6V Icc(-) for Vcc=2.5V 0 -40 -14 -20 0 20 40 60 80 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) 13/37 Electrical characteristics TS616 Figure 32. Slew rate vs. temperature AV = +4, Rfb = 910 VCC = 6 V, RL= 25 , 600 500 Figure 33. Slew rate vs. temperature AV = +4, Rfb = 910 VCC = 2.5 V, RL= 10 , 200 150 400 300 100 Slew Rate (V/s) 200 100 0 -100 -200 -300 -400 Positive&Negative SR Rfb=620 Positive&Negative SR Rfb=910 Slew Rate (V/s) Positive SR 50 0 -50 Negative SR -100 -150 -500 -600 -40 -20 0 20 40 60 80 -200 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) Figure 34. Iib(+) vs. temperature Open loop, no load 8 7 6 5 Vcc=6V Figure 35. Iib(+) vs. temperature Open loop, no load 5 4 Vcc=6V IIB(+) (A) 3 4 3 2 Vcc=2.5V 1 0 -1 -40 0 -40 1 IIB(-) (A) 2 Vcc=2.5V -20 0 20 40 60 80 -20 0 20 40 60 80 Temperature (C) Temperature (C) Figure 36. VOH vs. temperature Open loop 6 Figure 37. VOL vs. temperature Open loop 0 Vcc=2.5V Load=10 5 -1 4 -2 VOH (V) 3 VOL (V) Vcc=6vV Load=25 -3 2 -4 Vcc=6V Load=25 1 Vcc=2.5V Load=10 0 -40 -20 0 20 40 60 80 -5 -6 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) 14/37 TS616 Electrical characteristics Figure 38. Differential Vio vs. temperature Open loop, no load 450 Figure 39. Vio vs. temperature Open loop, no load 2.0 Vcc=6V 400 Vcc=2.5V 1.5 VIO (V) 350 VIO (mV) Vcc=6V 1.0 300 0.5 250 0.0 Vcc=2.5V 200 -40 -20 0 20 40 60 80 -0.5 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) Figure 40. Iout vs. temperature Open loop, VCC = 6 V, RL= 10 300 250 200 150 100 50 0 -50 -100 -150 -200 -250 -300 -350 -400 -450 -40 -20 0 20 40 60 80 Isink Isource Figure 41. Iout vs. temperature Open loop, VCC = 2.5 V, RL= 25 300 250 200 150 100 50 Isource Iout (mA) Iout (mA) 0 -50 -100 -150 -200 -250 -300 -350 -400 -450 -40 -20 0 20 40 60 80 Isink Temperature (C) Temperature (C) Figure 42. CMR vs. temperature Open loop, no load 70 68 66 64 Vcc=6V Figure 43. SVR vs. temperature Open loop, no load 84 82 Vcc=6V CMR (dB) SVR (dB) Vcc=2.5V 62 60 58 56 54 52 50 -40 80 78 76 Vcc=2.5V -20 0 20 40 60 80 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) 15/37 Safe operating area TS616 4 Safe operating area Figure 44 shows the safe operating zone for the TS616. The curve shows the input level vs. the input frequency--a characteristic curve which must be considered in order to ensure a good application design. In the dash-lined zone, the consumption increases, and this increased consumption could do damage to the chip if the temperature increases. Figure 44. Safe operating area 700 600 VINPUT (mVRMS) 500 Vcc=+/-6V Ta=25C G=12dB RL=100 400 300 SAFE OPERATING AREA 200 100 0 1M 10M 100M Frequency (Hz) 16/37 TS616 Intermodulation distortion product 5 Intermodulation distortion product The non-ideal output of the amplifier can be described by the following series, due to a nonlinearity in the input-output amplitude transfer: 2 n V out = C 0 + C 1 V in + C 2 V in + C n V in where the single-tone input is Vin=Asint, and C0 is the DC component, C1(Vin) is the fundamental, Cn is the amplitude of the harmonics of the output signal Vout. A one-frequency (one-tone) input signal contributes to a harmonic distortion. A two-tone input signal contributes to a harmonic distortion and an intermodulation product. This intermodulation product, or rather, the study of the intermodulation distortion of a twotone input signal is the first step in characterizing the amplifiers capability for driving multitone signals. The two-tone input is equal to: V in = A sin 1 t + B sin 2 t giving: t = C 0 + C 1 ( A sin 1 t + B sin 2 t ) + C 2 ( A sin 1 t + B sin 2 t ) ...+ C n ( A sin 1 t + B sin 2 t ) 2 n In this expression, we can extract distortion terms and intermodulation terms from a single sine wave: second-order intermodulation terms IM2 by the frequencies (1 - 2) and (1 +2) with an amplitude of C2A2 and third-order intermodulation terms IM3 by the frequencies (21 - 2), (21 +2), (-1 + 22) and (1 +22) with an amplitude of (3/4)C3A3. We can measure the intermodulation product of the driver by using the driver as a mixer via a summing amplifier configuration. In doing this, the non-linearity problem of an external mixing device is avoided. Figure 45. Non-inverting summing amplifier for intermodulation measurements 1k 49.9 Vin1 1k + +Vcc 49.9 1/2TS616 1:2 50 100 49.9 _ 910 Vin1 300 Rout1 Vout diff. 100 Rout2 910 2:1 50 1:2 50 100 300 49.9 1k _ 49.9 1/2TS616 + -Vcc 1k 49.9 17/37 Intermodulation distortion product TS616 The following graphs show the IM2 and the IM3 of the amplifier in different configurations. The two-tone input signal was generated by the multisource generator Marconi 2026. Each tone has the same amplitude. The measurement was performed using a HP3585A spectrum analyzer. Figure 46. Intermodulation vs. output amplitude 370 kHz & 400 kHz AV = +1.5, Rfb = 1k VCC = 2.5 V, RL= 14 diff. , -30 -40 Figure 47. Intermodulation vs. output amplitude 370 kHz & 400 kHz AV = +1.5, Rfb = 1k VCC = 2.5 V, RL= 28 diff. , -30 -40 IM2 and IM3 (dBc) -60 IM2 770kHz IM3 340kHz, 430kHz IM2 30kHz IM2 and IM3 (dBc) -50 -50 -60 IM3 340kHz, 430kHz IM2 30kHz IM2 770kHz -70 -70 -80 -80 -90 IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8 -90 IM3 1140kHz, 1170kHz 0 1 2 3 4 5 6 7 8 -100 -100 Differential Output Voltage (Vp-p) Differential Output Voltage (Vp-p) Figure 48. Intermodulation vs. gain 370 kHz & 400 kHz Vout= 6 Vpp, VCC = 2.5 V, RL= 20 diff. -30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz Figure 49. Intermodulation vs. load 370 kHz & 400 kHz AV = +1.5, Rfb = 1k Vout= .56 Vpp, VCC = 2.5 V , -30 -40 -50 IM3 340kHz, 430kHz, 1140kHz, 1170kHz IM2 and IM3 (dBc) -60 -70 -80 -90 -100 -110 1.0 IM2 and IM3 (dBc) IM2 30kHz -60 -70 -80 -90 -100 -110 IM2 770kHz IM2 30kHz IM2 770kHz 1.5 2.0 2.5 3.0 3.5 4.0 0 20 40 60 80 100 120 140 160 180 200 Closed Loop Gain (Linear) Differential Load () 18/37 TS616 Intermodulation distortion product Figure 50. Intermodulation vs. output amplitude 370 kHz & 400 kHz AV = +4, Rfb = 620 k RL= 200 diff., VCC = 6 V , -30 -40 -50 IM2 770kHz Figure 51. Intermodulation vs. output amplitude 370 kHz & 400 kHz AV = +4, Rfb = 620 k RL= 50 diff., VCC = 6 V , -30 -40 -50 IM3 1140kHz, 1170kHz IM3 340kHz, 430kHz IM2 30kHz IM2 770kHz IM2 and IM3 (dBc) -60 -70 -80 -90 -100 -110 0 2 4 6 IM3 340kHz, 430kHz IM2 and IM3 (dBc) 16 18 20 22 IM2 30kHz IM3 1140kHz, 1170kHz -60 -70 -80 -90 -100 -110 0 2 4 8 10 12 14 6 8 10 12 14 16 18 20 22 Differential Output Voltage (Vp-p) Differential Output Voltage (Vp-p) Figure 52. Intermodulation vs. output amplitude 100 kHz & 110 kHz AV = +4, Rfb = 620 k RL= 200 diff., VCC = 6 V , -30 -40 -50 IM3 90kHz, 120kHz IM3 310kHz IM3 320kHz Figure 53. Intermodulation vs. output amplitude 100 kHz & 110 kHz , AV = +4, Rfb = 620 k RL= 50 diff., VCC = 6 V -30 -40 -50 IM3 90kHz, 120kHz, 310kHz, 320kHz IM2 and IM3 (dBc) -60 -70 -80 -90 -100 -110 2 4 6 IM2 210kHz IM2 and IM3 (dBc) -60 -70 -80 -90 -100 -110 IM2 210kHz 8 10 12 14 16 18 20 22 2 4 6 8 10 12 14 16 18 20 22 Differential Output Voltage (Vp-p) Differential Output Voltage (Vp-p) Figure 54. Intermodulation vs. frequency range , AV = +4, Rfb = 620 k RL= 50 diff., Vout= 16 Vpp, VCC = 6 V, -60 -65 -70 -75 f1=100kHz f2=110kHz f1=200kHz f2=230kHz f1=400kHz f2=430kHz Quadratic Summation of all IM2 and IM3 components generated by each two-tones signal f1=1MHz f2=1.1MHz (dB) -80 -85 -90 -95 -100 100k 200k 300k 400k 500k 600k 700k 800k 900k 1M 1.1M 1M Frequency (Hz) 19/37 Printed circuit board layout considerations TS616 6 Printed circuit board layout considerations In the ADSL frequency range, printed circuit board parasites can affect the closed-loop performance. The use of a proper ground plane on both sides of the PCB is necessary to provide low inductance and a low resistance common return. The most important factors affecting gain flatness and bandwidth are stray capacitance at the output and inverting input. To minimize capacitance, the space between signal lines and ground plane should be maximized. Feedback component connections must be as short as possible in order to decrease the associated inductance which affects high-frequency gain errors. It is very important to choose the smallest possible external components--for example, surface mounted devices (SMD)--in order to minimize the size of all DC and AC connections. 6.1 Thermal information The TS616 is housed in an exposed-pad plastic package. As described in Figure 55, this package has a lead frame upon which the dice is mounted. This lead frame is exposed as a thermal pad on the underside of the package. The thermal contact is direct with the dice. This thermal path provides an excellent thermal performance. The thermal pad is electrically isolated from all pins in the package. It must be soldered to a copper area of the PCB underneath the package. Through these thermal paths within this copper area, heat can be conducted away from the package. The copper area must be connected to -VCC available on pin 4. Figure 55. Exposed-pad package Figure 56. Evaluation board 1 DICE Side View Bottom View DICE Cross Section View 20/37 R201 TS616 J205 R206 3 + Non-Inverting J206 + J206 1/2TS616 R207 R202 R202 2 R216 R216 R220 R220 R220 R214 R211 R211 R211 R214 R220 _ R207 1/2TS616 3 2 _ 1 R218 J210 1 R218 J210 R203 J207 R208 R215 R209 J208 7 R217 R221 R221 R221 5 + R212 Inverting R215 R209 1/2TS616 J208 1/2TS616 6 _ 6 _ R219 J211 7 R204 R219 R217 R221 J211 R204 R204 R204 Figure 57. Schematic diagram 5 + J209 R205 R213 R213 R210 Summing Amplifier R201 J205 R206 3 R207 R202 + J206 1/2TS616 Differential Amplifier R207 + 2 _ 1 R216 R214 R218 R220 J210 1/2TS616 R202 2 R216 R214 R211 R211 R211 R220 _ 1 R218 J210 R212 Power Supply R215 C202 6 _ R211 J206 3 +Vcc C205 100nF C201 100uF +Vcc 100nF J211 8 J201 +Vcc 3 + 1/2TS616 5 R217 + 7 R219 1/2TS616 R221 J202 GND J303 -Vcc C203 C204 2 _ 1 4 C206 100nF -Vcc -Vcc 100nF 100uF J209 R205 R205 R205 R213 R213 R213 R210 +Vcc 1 J204 2 3 6 _ 1/2TS616 5 -Vcc Printed circuit board layout considerations + 7 Exposed-Pad -Vcc 21/37 Printed circuit board layout considerations TS616 Figure 58. Component locations - top side Figure 59. Component locations - bottom side Figure 60. Top side board layout Figure 61. Bottom side board layout 22/37 TS616 Noise measurements 7 Noise measurements The noise model is shown in Figure 62, where: eN: input voltage noise of the amplifier iNn: negative input current noise of the amplifier iNp: positive input current noise of the amplifier Figure 62. Noise model + R3 iN+ _ TS616 eN output HP3577 Input noise: 8nV/Hz N3 iN- N2 R1 R2 N1 The closed loop gain is: R fb A V = g = 1 + -------Rg The six noise sources are: V1 = eN x 1 + R2 ------- R1 V2 = iNn x R2 V3 = iNp x R3 x 1 + R2 ------- R1 R2 V4 = - ------- x R1 V5 = 4kTR1 4kTR2 V6 = 1 + R2 4kTR3 ------- R1 We assume that the thermal noise of a resistance R is: 4kTR F where F is the specified bandwidth. On a 1 Hz bandwidth the thermal noise is reduced to: 4kTR where k is Boltzmann's constant, equal to 1374.10-23J/K. T is the temperature (K). 23/37 Noise measurements TS616 The output noise eNo is calculated using the Superposition Theorem. However eNo is not the sum of all noise sources, but rather the square root of the sum of the square of each noise source, as shown in Equation 1. Equation 1 No = V1 + V2 + V3 + V4 + V5 + V6 2 2 2 2 2 2 Equation 2 No = eN x g + iNn x R2 + iNp x R3 x g 2 2 2 2 2 2 2 2 2 R2 2 ...+ ------- x 4kTR1 + 4kTR2 + 1 + R2 x 4kTR3 ------ R1 R1 The input noise of the instrumentation must be extracted from the measured noise value. The real output noise value of the driver is: Equation 3 eNo = ( Measured ) - ( instrumentation ) 2 2 The input noise is called the Equivalent Input Noise as it is not directly measured but is evaluated from the measurement of the output divided by the closed loop gain (eNo/g). After simplification of the fourth and the fifth term of Equation 2 we obtain: Equation 4 2 2 2 2 2 2 2 = eN x g + iNn x R2 + iNp x R3 x g ...+ g x 4kTR2 + 1 + R2 x 4kT ------ R1 2 7.1 Measurement of eN If we assume a short-circuit on the non-inverting input (R3=0), Equation 4 becomes: Equation 5 No = eN x g + iNn x R2 + g x 4kTR2 2 2 2 2 In order to easily extract the value of eN, the resistance R2 will be chosen as low as possible. On the other hand, the gain must be large enough: R1=10 , R2=910 , R3=0, Gain=92 Equivalent input noise: 2.57 nV/Hz Input voltage noise: eN=2.5 nV/Hz 24/37 TS616 Noise measurements 7.2 Measurement of iNn To measure the negative input current noise iNn, we set R3=0 and use Equation 5. This time the gain must be lower in order to decrease the thermal noise contribution: R1=100 , R2=910 , R3=0, gain= 10.1 Equivalent input noise: 3.40 nV/Hz Negative input current noise: iNn =21 pA/Hz 7.3 Measurement of iNp To extract iNp from Equation 3, a resistance R3 is connected to the non-inverting input. The value of R3 must be chosen in order to keep its thermal noise contribution as low as possible against the iNp contribution. R1=100 , R2=910 , R3=100 , Gain=10.1 Equivalent input noise: 3.93 nV/Hz Positive input current noise: iNp=15 pA/Hz Conditions: Frequency=100 kHz, VCC = 2.5 V Instrumentation: HP3585A Spectrum Analyzer (the input noise of the HP3585A is 8 nV/Hz) 25/37 Power supply bypassing TS616 8 Power supply bypassing Correct power supply bypassing is very important for optimizing performance in highfrequency ranges. Bypass capacitors should be placed as close as possible to the IC pins to improve high-frequency bypassing. A capacitor greater than 1 F is necessary to minimize the distortion. For better quality bypassing, a capacitor of 10 nF is added using the same implementation conditions. Bypass capacitors must be incorporated for both the negative and the positive supply. Figure 63. Circuit for power supply bypassing +VCC + 10nF 10F + TS616 - 10nF 10F + -VCC 8.1 Single power supply The TS616 can operate with power supplies ranging from 12 V to 5 V. The power supply can either be single (12 V or 5 V referenced to ground), or dual (such as 6 V and 2.5 V). In the event that a single supply system is used, new biasing is necessary to assume a positive output dynamic range between 0 V and +VCC supply rails. Considering the values of VOH and VOL, the amplifier will provide an output dynamic from +0.5 V to 10.6 V on 25 load for a 12 V supply and from 0.45 V to 3.8 V on 10 load for a 5 V supply. The amplifier must be biased with a mid-supply (nominally +VCC/2), in order to maintain the DC component of the signal at this value. Several options are possible to provide this bias supply, such as a virtual ground using an operational amplifier or a two-resistance divider (which is the cheapest solution). A high resistance value is required to limit the current consumption. On the other hand, the current must be high enough to bias the non-inverting input of the amplifier. If we consider this bias current (30 A max.) as the 1% of the current through the resistance divider to keep a stable mid-supply, two resistances of 2.2 k can be used in the case of a 12 V power supply and two resistances of 820 can be used in the case of a 5 V power supply. The input provides a high-pass filter with a break frequency below 10 Hz which is necessary to remove the original 0 volt DC component of the input signal, and to fix it at +VCC/2. Figure 64 shows a schematic of a 5 V single power supply configuration. 26/37 TS616 Figure 64. Circuit for +5 V single supply +5V 10F IN +5V R1 820 Rfb R2 820 + 1F 10nF + RG CG Rin 1k Power supply bypassing + 1/2 TS616 100F OUT 10 _ 8.2 Channel separation and crosstalk Figure 65 shows an example of crosstalk from one amplifier to a second amplifier. This phenomenon, accentuated at high frequencies, is unavoidable and intrinsic to the circuit itself. Nevertheless, the PCB layout also has an effect on the crosstalk level. Capacitive coupling between signal wires, distance between critical signal nodes and power supply bypassing are the most significant factors. Figure 65. Crosstalk vs. frequency: AV=+4, Rfb=620 VCC= 6 V, Vout= 2 Vp , -50 -60 -70 -80 -90 -100 -110 -120 -130 10k CrossTalk (dB) 100k 1M 10M Frequency (Hz) 27/37 Choosing the feedback circuit TS616 9 Choosing the feedback circuit As described in Figure 67 on page 29, the TS616 requires a 620 feedback resistor to optimize the bandwidth with a gain of 12 dB for a 12 V power supply. Nevertheless, due to production test constraints, the TS616 is tested with the same feedback resistor for 12 V and 5 V power supplies (910 ). Table 5. VCC (V) Closed-loop gain - feedback components Gain +1 +2 +4 +8 Rfb () 750 680 620 510 680 680 620 510 1.1k 1k 910 680 1k 1k 910 680 6 -1 -2 -4 -8 +1 +2 +4 +8 2.5 -1 -2 -4 -8 28/37 TS616 Choosing the feedback circuit 9.1 The bias of an inverting amplifier A resistance is necessary to achieve good input biasing, such as resistance R, shown in Figure 66. The magnitude of this resistance is calculated by assuming the negative and positive input bias current. The aim is to compensate for the offset bias current, which could affect the input offset voltage and the output DC component. Assuming Ib-, Ib+, Rin, Rfb and a zero volt output, the resistance R is: R = Rin // Rfb Figure 66. Compensation of the input bias current Rfb Ib- Rin _ Vcc+ Output TS616 + Ib+ R Vcc- Load 9.2 Active filtering Figure 67. Low-pass active filtering - Sallen-Key C1 R1 IN R2 C2 + OUT TS616 _ 25 RG Rfb 910 From the resistors Rfb and RG, we can directly calculate the gain of the filter in a classic noninverting amplification configuration: R fb A V = g = 1 + -------Rg We assume the following expression as the response of the system: Vout j g T j = ---------------- = ---------------------------------------Vin j j ( j) 2 1 + 2 ---- + ----------c 2 c 29/37 Choosing the feedback circuit The cutoff frequency is not gain-dependent and so becomes: 1 c = -----------------------------------R1R2C1C2 TS616 The damping factor is calculated by the following expression: 1 = -- c ( C 1 R 1 + C 1 R 2 + C 2 R 1 - C 1 R 1 g ) 2 The higher the gain the more sensitive the damping factor is. When the gain is higher than 1, it is preferable to use some very stable resistor and capacitor values. In the case of R1 = R2: R fb 2C 2 - C 1 -------Rg = -------------------------------2 C1 C2 30/37 TS616 Increasing the line level using active impedance matching 10 Increasing the line level using active impedance matching With passive matching, the output signal amplitude of the driver must be twice the amplitude on the load. To go beyond this limitation an active matching impedance can be used. With this technique, it is possible to maintain good impedance matching with an amplitude on the load higher than half of the output driver amplitude. This concept is shown in Figure 68 for a differential line. Figure 68. TS616 as a differential line driver with active impedance matching 1 100n + Vcc+ 1k _ Vcc+ GND Rs1 10n R2 R3 Vi 1/2 R1 Vo Vo 1:n Hybrid & Transformer Vcc/2 1/2 R1 RL Vo 100 R5 Vi 1k 10 100n GND + _ R4 Vcc+ GND Vo Rs2 100n Component calculation Let us consider the equivalent circuit for a single-ended configuration, as shown in Figure 69. Figure 69. Single-ended equivalent circuit + Vi Rs1 Vo Vo _ R2 -1 R3 1/2 R1 1/2 RL 31/37 Increasing the line level using active impedance matching TS616 First let's consider the unloaded system. We can assume that the currents through R1, R2 and R3 are respectively: 2Vi ( Vi - Vo ) -------- , --------------------------- and ( Vi + Vo ) ----------------------R1 R2 R3 As Vo equals Vo without load, the gain in this case becomes: 1 + 2R2 + R2 ---------- ------Vo ( noload ) = ----------------------------------R1 R3 G = ------------------------------Vi 1 - R2 ------R3 The gain, for the loaded system is given by Equation 6: Equation 6 1 + 2R2 + R2 ---------- ------R1 R3 Vo ( withload ) = 1 -----------------------------------GL = -----------------------------------2 Vi 1 - R2 ------R3 The system shown in Figure 70 is an ideal generator with a synthesized impedance acting as the internal impedance of the system. From this, the output voltage becomes: Equation 7 Vo = ( ViG ) - ( Ro Iout ) where Ro is the synthesized impedance and Iout the output current. On the other hand Vo can be expressed as: Equation 8 Vi 1 + 2R2 + R2 ---------- ------ R1 R3 ---------------------Vo = ----------------------------------------------- - Rs1Iout 1 - R2 ------1 - R2 ------R3 R3 By identification of both Equation 7 and Equation 8, the synthesized impedance is, with Rs1 = Rs2 = Rs: Equation 9 Rs Ro = ---------------1 - R2 ------R3 32/37 TS616 Increasing the line level using active impedance matching Figure 70. Equivalent schematic - Ro is the synthesized impedance Ro Iout Vi.Gi 1/2RL Let us write Vo=kVo, where k is the matching factor varying between 1 and 2. If we assume that the current through R3 is negligible, we can calculate the output resistance, Ro: kVoRL Ro = ---------------------------RL + 2Rs1 After choosing the k factor, Rs will be equal to 1/2RL(k-1). For a good impedance matching we assume that: Equation 10 1 Ro = -- RL 2 From Equation 9 and Equation 10, we derive: Equation 11 R2 = 1 - 2Rs ---------------R3 RL By fixing an arbitrary value of R2, Equation 11 becomes: R2 R3 = -------------------1 - 2Rs ---------RL Finally, the values of R2 and R3 allow us to extract R1 from Equation 6, so that: Equation 12 2R2 R1 = --------------------------------------------------------- 1 - R2 GL - 1 - R2 2 ------------ R3 R3 with GL the required gain. Table 6. Components calculation for impedance matching implementation GL is fixed for the application requirements GL= Vo/Vi= 0.5(1+2R2/R1+R2/R3)/(1-R2/R3) 2R2/[2(1-R2/R3)GL-1-R2/R3] Arbitrarily fixed R2/(1-Rs/0.5RL) 0.5RL(k-1) kRL/2 GL (gain for the loaded system) R1 R2 (= R4) R3 (= R5) Rs Load viewed by each driver 33/37 Package information TS616 11 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 34/37 TS616 Figure 71. SO-8 exposed pad package mechanical drawing Package information Table 7. SO-8 exposed pad package mechanical data Dimensions Millimeters Inches Max. 1.750 0.150 1.650 0.510 0.250 5.000 3.10 3.800 2.41 1.270 5.800 0.250 0.400 0d 6.200 0.500 1.270 8d 0.100 0.228 0.010 0.016 0d 4.000 0.150 0.095 0.050 0.244 0.020 0.050 8d 0.004 Ref. Min. A A1 A2 B C D D1 E E1 e H h L k ddd 1.350 0.000 1.100 0.330 0.190 4.800 Typ. Min. 0.053 0.001 0.043 0.013 0.007 0.189 Typ. Max. 0.069 0.0059 0.065 0.020 0.010 0.197 0.122 0.157 35/37 Ordering information TS616 12 Ordering information Table 8. Order codes Temperature range -40C to +85C TS616IDWT Part number TS616IDW Package SO-8 Packaging Tube Tape & reel Marking TS616 TS616 13 Revision history Date 1-Nov-2002 Revision 1 First release. Changes 03-Dec-2004 2 Moved note in Table 3 to Section 9: Choosing the feedback circuit on page 28. Figure 43 in Revision 1, entitled Group Delay, has been removed because the results presented were not technically meaningful. Simplified mathematical representations of the intermodulation product in Section 5: Intermodulation distortion product on page 17. In Section 6: Printed circuit board layout considerations on page 20, change from "The copper area can be connected to (-Vcc) available on pin 4." to "The copper area must be connected to -Vcc available on pin 4.". In Section 9.1: The bias of an inverting amplifier on page 29, change of section title, and correction of referred figure to Figure 66. Format update. Corrected package mechanical data for SO-8 exposed pad. Corrected package error in Table 8: Order codes. Corrected package error in Table 8: Order codes. 24-Oct-2006 16-Apr-2007 26-Sep-2008 3 4 5 36/37 TS616 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 37/37 |
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